System Structure

In this system we will be using the subunits of the 68332 processor.

SIM - System Interface Module. Contains parallel ports, timers, chip select circuitry

SCI - The Serial Communication Interface. A typical serial port.

SPI - Serial Peripheral Interface. A high speed serial port for onboard peripherals like ADCs and serial switches.

TPU -The time processing unit. A coprocessor used to take care of time related functions.

Each of the subunits will have to be configured in turn before they can be used. The processor typically starts with these modules disabled since they would generate interrupts from noise on the unconnected pins.

SIM – the system interface module is used to connect the central processor to the various sub-modules. The SIM handles the chip select control registers as well as the watchdog timer.

The chip select registers are used to control 11 pins to enable, or select, 11 devices outside of the processor chip. These pins are typically connected to memory devices, both RAM and ROM.

In the past the system builder would take the addresses on the address bus and “decode” them using devices like PALs to generate enable lines for memory devices. For example, when an address between 0 (zero) and 4095 was placed on the address bus, the PAL would generate an enable signal for the boot ROMs. When the address 4096 was placed, it would generate a signal for the RAM chips.

Motorola made the decision to place all of their sub-modules at certain addresses, this is called using memory mapped devices. So, if you want to access the serial port, you just have to place a value at a particular address. Intel, on the other hand, has specific instructions to output and input values to devices. The tradeoffs are that Intel has (or could have) a memory structure without any holes (forget the whole 640K thing, and expanded memory, yadda yadda yadda), but Motorola is much easier to implement and can have many more devices (and the holes in the memory map can be covered up by memory management units).

So, where does that leave us? The chip select registers act like the address decoding PALs of old, but better. When the system boots, only one chip select has been set up, CSBOOT (chip select for boot). CSBOOT assumes that it is connected to a ROM/EPROM/Flash chip that is 16 bits wide and less than or equal to 1MB big, pretty reasonable really. Once the system is started the rest of the chip select registers are set up to access the rest of the memory, like static RAM since a system cannot run in ROM alone.

Other chip selects can be set up to control external devices, like bus connected ADC chips.

If an address shows up on the address bus that has NOT been predetermined and programmed into the chip select registers, such as if you were to over index an array or follow a bad pointer, the SIM will generate an bus error interrupt. This will typically halt the system.

The watchdog timers are used to generate an interrupt and reset the system if your code goes into an unexpected infinite loop. The general idea is that you have to check in with the SIM occasionally or else it figures that you have lost your mind and resets the processor.

The SIM also controls access to parallel port bits for turning stuff on and off (like LEDs).

SCI – The SCI is a serial port used to communicate data from the processor to a remote device (typically a PC less than 400 feet away) at a low speed (typically less than 1000 characters per second).

You have to configure the baud rate, the number of bits in a character, parity, and such, then drop in a character and it will tell you when it is finished.

There are two ways to handle the SCI; polling and interrupts. With polling, you give it a character to send and madly read the status register until the SCI sets the bit that tells you that it is done. Reading is done in a similar way, madly read the status register until the SCI tells you that a character has been received. With interrupts, you go off and do your every day job of calculating square roots, or folding proteins and the SCI will tap you on the shoulder when the character is gone or a new one comes in.

The trade-offs between the two methods are that polling is very inefficient, since you are doing no useful work while writing out “hello world”, whereas interrupts are a bit more difficult to get working the first time, and are not very well understood by beginners.

QSPI – The QSPI is a submodule that implements the SPI protocol for transferring information between a master processor and a slave device over a short distance (typically between chips on the same board or between boards) at a very high speed (typically around 250,000 to 1,000,000 messages per second)

The “Q” in QSPI stands for queued. The QSPI can queue up to 16 commands, set up the queue, start it, go off and do something else and it will tell you when it is done (polling or interrupts again).

There are lots of chips made that use the SPI protocol, like clock chips, ADC, DAC, communication, and other processor chips. This processor can talk to up to 16 SPI chips in one system.

TPU – This is the cool bit. A lot of chips have their equivalent of the SIM, SCI, and QSPI, but the TPU is unique. The TPU is a processor within the processor, running independent of the main processor (using polling or interrupts again), controlling systems where you have turn pins on and off according to some strict time schedule and sequence.

The simplest time function that the TPU does is DIO which could be best described as a parallel port. Other functions would be things like SCI and SPI, in case you need another.

We will be using a special set of functions, written by Motorola (Freescale) that are specifically written to control a 4 stroke internal combustion engine. The functions track the position of the engine through its 720° cycle and provide the hooks to generate outputs synchronized to the engine position for ignition and injection events. Other typical outputs would be DIO for fuel relays and PWM (pulse width modulation) for idle control.